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PAM4 vs NRZ Qualification: Optics Selection Guide


What changes when a link moves from NRZ to PAM4
NRZ uses two signal levels, so one symbol carries one bit and the symbol rate of a lane equals its line rate. PAM4 uses four levels, so one symbol carr

What changes when a link moves from NRZ to PAM4

NRZ uses two signal levels, so one symbol carries one bit and the symbol rate of a lane equals its line rate. PAM4 uses four levels, so one symbol carries two bits and a lane runs at half the baud for the same bit rate. That is what allows a 100G lane on 53 GBd instead of 106 GBd, and it is why every lane rate above 50G is four level.

The trade is noise margin. Four levels sit closer together than two, and the spacing between them is roughly 9.5 dB smaller in signal to noise terms at the same symbol rate. A four level link therefore cannot be qualified with the eye diagram rules a two level link uses. The rate families are collected on optics selection guides.

Why the qualification question changes with the signalling

A two level transmitter is judged on an eye mask: the opening has to clear a template with margin at the sample point. A four level transmitter has three eyes and no single mask describes them, so the measurement moved to TDECQ, the transmitter and dispersion eye closure for quaternary signalling. TDECQ is measured against a reference receiver, includes the dispersion penalty, and produces a figure that must sit inside a limit per lane rate.

The receiver side changed as much. Four level links lean on forward error correction in the module and in the host, so the figure that matters is the bit error ratio the host counts before correction, and for 50G per lane the working target is about 2.4 x 10^-4 pre-FEC. A part can show clean eyes and still fail once the host counts errors over hours of live traffic.

Recommended modules by signalling scheme

ModuleSignallingLanesReach classWhere it usually lands
10G SFP+Two level1 x 10G300 m to 80 km classesAccess and legacy aggregation ports
25G SFP28Two level1 x 25G100 m to 40 km classesServer and top of rack ports
40G QSFP+Two level4 x 10G100 m to 10 km classesExisting aggregation rows
100G QSFP28 four laneTwo level4 x 25G100 m to 80 km classesLeaf, spine and uplink ports
100G QSFP28 single lambdaFour level1 x 100G500 m to 10 km classesNew single lambda links and breakouts
200G QSFP56Four level4 x 50G100 m to 2 km classesHigh rate server and fabric ports
400G QSFP-DD and OSFPFour level8 x 50G500 m to 450 km classesAI and data center fabrics
800G OSFP and QSFP-DDFour level8 x 100G500 m to 2 km classesNew AI fabric ports
Coherent pluggablesFour level with coherent detection1 carrierMetro to regional classesRouter ports carrying wavelengths

Reach classes are the standard ones for each family and the working limit stays the measured budget of the link. The rate pages carry the model lists, including 100G QSFP28, 400G QSFP-DD and OSFP and 800G optics for AI and data center fabrics.

What the bench has to show

Four measurements decide whether a four level part is qualified. The transmitter figure is TDECQ per lane across the temperature range. The receiver figure is sensitivity at the correction target rather than at an uncorrected floor. The third is the link budget with the real fibre and connector count. The fourth is the correction margin read from host counters under live traffic, because a link that corrects errors all day has no margin left for ageing.

Two level parts are qualified with an eye mask and a sensitivity figure at a plain error ratio, and the two sets cannot be compared.

Host support, error correction and interoperability

Four level signalling needs the host to be told what to expect. The port has to support the lane structure and the correction mode of the module, and both ends have to agree, because a link with correction enabled at one end and disabled at the other will not come up even where the optics match. Where a 100G port is broken out into four 25G lanes, the break mode and the correction setting belong in the port plan.

Firmware matters as much as hardware. The same model can be accepted by one release and rejected by the next, so the release in use belongs in the request. Parts are coded for the host named on the request, tested on that platform, and they are not manufactured by that brand. Coded parts for the common hosts are collected on the Cisco, Arista and Juniper pages.

Coding, spares and the ordering inputs

Spares are counted per signalling scheme rather than per rate, because a 100G two level part and a 100G four level part are not interchangeable even though both report 100G. A mixed estate needs one spare per coded group per scheme, and the record should note the correction mode each working part runs.

The selection side is covered on CWDM4, PSM4 and DR4 and DR8, FR4 and ZR+, and the coding side on optical module coding and compatibility.

How to choose, in order

  1. Fix the line rate per port and the lane structure the host supports.
  2. Decide the signalling scheme from the rate and the host.
  3. Set the reach class and the temperature grade per port.
  4. Confirm the correction mode at both ends and record it with the port plan.
  5. Ask for TDECQ per lane and sensitivity at the stated error ratio, not a mask margin.
  6. Order one spare per coded group per scheme, after the link has run live traffic.

Frequently asked questions

Can a four level module work in a port that only supports two level signalling?
No. The host must support the lane structure and the correction mode, or the port comes down. Check the port capability before ordering.

Why does a link pass a bench eye test and still raise errors?
Because the bench test is a snapshot while errors accumulate over time and temperature. The figure that decides is the corrected error count the host reports after hours of traffic.

Is forward error correction optional on a four level link?
Treat it as part of the link. The lane budget is planned around the correction gain, so a link specified without it has no margin.

Do both ends need the same correction mode?
Yes. The two hosts must agree on the mode, and a breakout port carries its own setting.

What do you need to qualify a four level order?
The host model and firmware release, the lane rate and port count, the reach class per port, the temperature grade, and the correction mode each end will run.

Send the host model with its release, the lane rate and port count and the measured reach per port, and we come back with the part per port, the correction mode and the spare lines set out separately. Related reading: coherent pluggable optics, long haul coherent 400G and 800G and all optics selection guides.